Array substrate, display panel having the same and method of manufacturing the same

ABSTRACT

In an array substrate, the array substrate includes an insulation member in each pixel area and a color filter layer that surrounds each insulation member. The color filter layer includes color filters having two or more colors that are different from each other, and a color filter is formed in each pixel area. An insulation member is arranged in each pixel area and all the insulation members include the same material. The insulation members are partially removed in each pixel area to form contact holes having the same size.

CROSS-REFERENCE TO RELATED APPLICATION

This application claims priority from and the benefit of Korean PatentApplication No. 10-2006-0091388, filed on Sep. 20, 2006, which is herebyincorporated by reference for all purposes as if fully set forth herein.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to an array substrate, a display panelincluding the array substrate, and a method of manufacturing the arraysubstrate. More particularly, the present invention relates to an arraysubstrate having a color filter-on-array (COA) structure, a displayapparatus including the array substrate, and a method of manufacturingthe array substrate.

2. Discussion of the Background

In general, a COA-type liquid crystal display panel includes an arraysubstrate, an opposite substrate facing the array substrate, and aliquid crystal layer interposed between the array substrate and theopposite substrate.

The array substrate includes a plurality of pixels that displays animage. Each pixel includes a gate line, a data line, a thin filmtransistor, a pixel electrode, and a color filter. The gate line and thedata line receive a gate signal and a data signal, respectively, and areconnected to a gate electrode and a source electrode of the thin filmtransistor, respectively. The pixel electrode is connected to a drainelectrode of the thin film transistor and outputs a pixel voltage. Thecolor filter is arranged under the pixel electrode and displays apredetermined color using a light. The pixel electrode is connected tothe drain electrode of the thin film transistor through a contact holeformed in the color filter.

The color filter may be a red filter, a green filter, or a blue filter.Since the material characteristics of the red, green, and blue filtersare different from each other, the exposure amount required for acontact hole to be formed through each differs, even though the contactholes are formed under the same process conditions. Thus, the sizes ofthe contact holes are different in the red, green, and blue filters, andif the size of a contact hole becomes too small, the drain electrode ofthe thin film transistor may not be exposed. As a result, the thin filmtransistor and the pixel electrode may be insulated from each other andan abnormal image may be displayed.

SUMMARY OF THE INVENTION

The present invention provides an array substrate that may be capable ofimproving product yield.

The present invention also provides a display panel including the abovearray substrate.

The present invention also provides a method for manufacturing the abovedisplay panel.

Additional features of the invention will be set forth in thedescription which follows, and in part will be apparent from thedescription, or may be learned by practice of the invention.

The present invention discloses an array substrate including a basesubstrate, thin film transistors, pixel electrodes, insulation members,and a color filter layer. The base substrate includes a plurality ofpixel area to display an image and a thin film transistor is arranged ineach pixel area. A pixel electrode is arranged in each pixel area and isconnected to the thin film transistor. An insulation member is arrangedin each pixel area and provided with a contact hole through which thethin film transistor is exposed. The insulation members all include thesame material. The color filter layer includes color filters arrangedunder the pixel electrode to surround the insulation members.

The present invention also discloses a liquid crystal display panelincluding an array substrate and an opposite substrate facing the arraysubstrate. The array substrate includes a first base substrate, thinfilm transistors, pixel electrodes, insulation members, and a colorfilter layer. The first base substrate includes a plurality of pixelareas to display an image. The thin film transistor is arranged in eachpixel areas. The pixel electrode is arranged in each pixel area and isconnected to the thin film transistor. The insulation members allinclude the same material. An insulation member is arranged in eachpixel area and is provided with a contact hole through which the thinfilm transistor is exposed. The color filter layer includes colorfilters arranged under the pixel electrode to surround the insulationmembers.

The present invention also discloses a method for manufacturing adisplay panel including forming a thin film transistor, a first storageelectrode, and a second storage electrode in a pixel area of a firstbase substrate. The second storage electrode is branched from a drainelectrode of the thin film transistor and disposed on the first storageelectrode. A color filter is formed in the pixel area. A color filterformed on the second storage electrode is removed. A black matrix thatincluding a contact hole is formed on the second storage electrode. Apixel electrode is formed on the color filter and the black matrix suchthat the pixel electrode is connected to the second storage electrodethrough the contact hole. A common electrode is formed on a second basesubstrate. The first base substrate is coupled with the second basesubstrate.

It is to be understood that both the foregoing general description andthe following detailed description are exemplary and explanatory and areintended to provide a further explanation of the invention as claimed.

BRIEF DESCRIPTION OF THE DRAWINGS

The accompanying drawings, which are included to provide a furtherunderstanding of the invention and are incorporated in and constitute apart of this specification, illustrate embodiments of the invention, andtogether with the description serve to explain the principles of theinvention.

FIG. 1 is a plan view showing a liquid crystal display panel accordingto an exemplary embodiment of the present invention

FIG. 2 is a sectional view taken along line I-I′ of FIG. 1.

FIG. 3A, FIG. 3B, FIG. 3C, FIG. 3D, and FIG. 3E are sectional viewsshowing a method for manufacturing an array substrate and a spacer shownin FIG. 2.

FIG. 4 is a plan view showing a liquid crystal display panel accordingto another exemplary embodiment of the present invention;

FIG. 5 is a sectional view taken along line II-II′ of FIG. 4.

FIG. 6A, FIG. 6B, FIG. 6C, FIG. 6D, and FIG. 6E are sectional viewsshowing a manufacturing process of an array substrate and a spacer shownin FIG. 5.

DETAILED DESCRIPTION OF THE ILLUSTRATED EMBODIMENTS

The invention is described more fully hereinafter with reference to theaccompanying drawings, in which embodiments of the invention are shown.This invention may, however, be embodied in many different forms andshould not be construed as limited to the embodiments set forth herein.Rather, these embodiments are provided so that this disclosure isthorough, and will fully convey the scope of the invention to thoseskilled in the art. In the drawings, the size and relative sizes oflayers and regions may be exaggerated for clarity. Like referencenumerals in the drawings denote like elements.

It will be understood that when an element or layer is referred to asbeing “on” or “connected to” another element or layer, it can bedirectly on or directly connected to the other element or layer, orintervening elements or layer may be present. In contrast, when anelement is referred to as being “directly on” or “directly connected to”another element or layer, there are no intervening elements or layerspresent.

FIG. 1 is a plan view showing a liquid crystal display panel accordingto an exemplary embodiment of the present invention, and FIG. 2 is asection view taken along line I-I′ of FIG. 1.

Referring to FIG. 1 and FIG. 2, a liquid crystal display panel 500includes an array substrate 100, an opposite substrate 200, and a liquidcrystal layer 300.

The array substrate 100 includes a first base substrate 110, a gate lineGL, a data line DL, a thin film transistor 120, a pixel electrode 130, acolor filter 140, and a black matrix 150.

The first base substrate 110 is divided into a plurality of pixel areasthat displays an image.

The gate line GL extends in a first direction D1 on the first basesubstrate 110 to transmit a gate signal.

The data line DL is insulated from and crosses the gate line GL totransmit a data signal. The data line DL and the gate line GL define apixel area PA.

The pixel area PA includes the thin film transistor 120, the pixelelectrode 130, the color filter 140, and the black matrix 150. The thinfilm transistor 120 includes a gate electrode 121 branched from the gateline GL, an active layer 122, and an ohmic contact layer 123sequentially formed on the gate electrode 121, a source electrode 124branched from the data line DL and formed on the ohmic contact layer123, and a drain electrode 125 formed from the same layer as the sourceelectrode 124.

The pixel electrode 130 is connected to the drain electrode 125 andoutputs a pixel voltage. The pixel electrode 130 includes a transparentconductive material such as indium tin oxide (ITO) or indium zinc oxide(IZO).

The array substrate 100 further includes a gate insulating layer 161 anda protective layer 162 to protect the metal wires. The gate insulatinglayer 161 is formed on the first base substrate 110 to cover the gateline GL and the gate electrode 121. The protective layer 162 is formedon the gate insulating layer 161 to cover the data line DL, the sourceelectrode 124, and the drain electrode 125.

Also, the array substrate 100 further includes a common voltage line CLto transmit a common voltage, a first storage electrode SE1, and asecond storage electrode SE2. The common voltage line CL is formed fromthe same layer as the gate line GL and extends in the first directionD1. The first storage electrode SE1 is branched from the common voltageline CL. The second storage line SE2 extends from the drain electrode125 and is arranged on the first storage electrode SE1. The secondstorage line SE2 is connected to the pixel electrode 130. The gateinsulating layer 161 is interposed between the first storage electrodeSE1 and the second storage electrode SE2, and serves as a storagecapacitor with the first storage electrode SE1 and the second storageelectrode SE2.

The color filter 140 is formed on the protective layer 162, and isarranged partially under the pixel electrode 130 and removed from aregion corresponding to the second storage electrode SE2. The colorfilter 140, which displays a predetermined color using light, includes ared, green, or blue color filter and is formed in the pixel area PA.Also, the color filter 140 may be thick enough to planarize the arraysubstrate 100. Thus, in this case, a separate organic insulating layeris not needed to planarize the array substrate 100.

The black matrix 150 is arranged on the second storage electrode SE2 andunder the pixel electrode 130. The color filter 140 surrounds the blackmatrix 150 in a plan view. The black matrix 150 includes a black organicmaterial to block the light. The black matrix 150 and the protectivelayer 162 may be partially removed to form a contact hole CH, whichexposes the second storage electrode SE2. The pixel electrode 130 isconnected to the second storage electrode SE2 through the contact holeCH, so that the drain electrode 125 and the pixel electrode 130 areconnected to each other. Since each contact hole CH is formed byremoving the black matrix 150 in the corresponding pixel area PA, thecontact holes CH in each pixel area PA may be the same size.

In general, the red, green, and blue color filters may have differentmaterial characteristics from each other. Thus, although the colorfilters are etched using the same etching process, the etching amount ofeach color filter is different. Therefore, when the contact hole CH isformed by removing the color filter 140, the size of the contact hole CHmay be different according to the color of the color filter 140.

In order to prevent the above-described disadvantage, the black matrix150 may be formed in each pixel area PA of the array substrate 100, andthen a portion of the black matrix 150 may be removed to form thecontact hole CH. Thus, the size of the contact hole CH in each pixelarea PA may be the same, so that the pixel electrode 130 may not beinsulated from the second storage electrode SE2, thereby improvingproduct yield.

The opposite substrate 200 is arranged on the array substrate 100. Theopposite substrate 200 includes a second base substrate 210 coupled withthe first base substrate 110 while facing the first base substrate 110and a common electrode 220 formed on the second base substrate 210. Thecommon electrode 220 includes a transparent conductive material such asITO, IZO, etc., and provides the common voltage to the liquid crystallayer 300. The liquid crystal layer 300 controls the transmittance oflight according to an electric field formed between the array substrate100 and the opposite substrate 200.

The liquid crystal display panel 500 further includes a spacer 400 thatuniformly maintains a cell gap between the array substrate 100 and theopposite substrate 200. A spacer 400 is formed in each pixel area PA andarranged on the thin film transistor 120. The spacer 400 may include thesame material as the black matrix 150 and may be formed through the sameprocess as the black matrix 150. Since each spacer 400 and black matrix150 may include the same material, the opposite substrate 200 may notrequire a separate black matrix to prevent the thin film transistor 120from being recognized from the outside. As a result, the number ofmanufacturing processes may be decreased and misalignment between thearray substrate 100 and the opposite substrate 200 may be prevented.

FIG. 3A, FIG. 3B, FIG. 3C, FIG. 3D, and FIG. 3E are sectional viewsshowing a method of manufacturing the array substrate and the spacershown in FIG. 2.

Referring to FIG. 3A, the gate insulating layer 161, the thin filmtransistor 120, the first storage electrode SE1, and the second storageelectrode SE2 are formed on the first base substrate 110, and theprotective layer 162 is formed on the first base substrate 110 to coverthe gate insulating layer 161, the thin film transistor 120, the firststorage electrode SE1, and the second storage electrode SE2.

Referring to FIG. 3B, a photoresist layer (not shown) corresponding tothe color filter 140 is coated over the protective layer 162 and ispatterned to form the color filter 140. While patterning the photoresistlayer, the photoresist layer is removed from an area corresponding tothe second storage electrode SE2, to provide the color filter 140 withan opening 141.

Referring to FIG. 3C and FIG. 3D, a black photoresist layer 10 includinga black organic material is deposited on the first base substrate 110and the opening 141 is filled with the black photoresist layer 10.

Then, the black photoresist layer 10 is patterned to form the blackmatrix 150 and the spacer 400. While patterning the black photoresist10, the black matrix 150 is partially removed such that the protectivelayer 162 is exposed through the removed portion of the black matrix150. Since the black matrix 150 and the spacer 400 are formedsubstantially simultaneously through the same process, it may bepossible to reduce the number of masks, the number of manufacturingsteps, and the manufacturing costs, thereby improving productivity.

Referring to FIG. 2 and FIG. 3E, the protective layer 162 exposedthrough the removed portion of the black matrix 150 is removed to formthe contact hole CH. Then, the pixel electrode 130 is formed on thecolor filter 140 and the black matrix 150 such that the pixel electrode130 contacts the second storage electrode SE2 through the contact holeCH, thereby completing the array substrate 100 and the spacer 400.

FIG. 4 is a plan view showing a liquid crystal display panel accordingto another exemplary embodiment of the present invention, and FIG. 5 isa sectional view taken along line II-II′ of FIG. 4.

Referring to FIG. 4 and FIG. 5, a liquid crystal display panel 900includes an array substrate 600, a liquid crystal layer 300, and anopposite substrate 700. In the present exemplary embodiment, the liquidcrystal layer 300 has same structure and function as that of the liquidcrystal layer in FIG. 2, and thus, the same reference numeral isassigned to the liquid crystal layer and a detailed description of theliquid crystal layer will be omitted.

The array substrate 600 includes a first base substrate 110, a gate lineGL, a first data line DL1, a second data line DL2, a third data lineDL3, a first thin film transistor 610, a second thin film transistor620, a third thin film transistor 630, a first pixel electrode 641, asecond pixel electrode 642, a third pixel electrode 643, a first colorfilter 651, a second color filter 652, and a third color filter 653.

The first base substrate 110 includes a first pixel area PA1, a secondpixel area PA2, and a third pixel area PA3 on which an image isdisplayed. The gate line GL formed on the first base substrate 110extends in a first direction D1. The first, second, and third data linesDL1, DL2, and DL3 are insulated from and cross the gate line GL todefine the first, second, and third pixel areas PA1, PA2, and PA3. Thefirst, second, and third data lines DL1, DL2, and DL3 extend in thesecond direction D2.

The first, second, and third thin film transistors 610, 620, and 630 areformed in the first, second, and third pixel areas PA1, PA2, and PA3,respectively, and are connected to the first, second, and third datalines DL1, DL2, and DL3, respectively. According to the presentexemplary embodiment, the first, second, and third thin film transistors610, 620, and 630 each have the same configuration. Thus, only the firstthin film transistor 610 will be described in detail and detaileddescriptions of the second and third thin film transistors 620 and 630will be omitted to avoid redundancy.

The first thin film transistor 610 includes a gate electrode 611branched from the gate line GL, an active layer 612, and an ohmiccontact layer 613 sequentially formed on the gate electrode 611, asource electrode 614 branched from the data line DL1 and formed on theohmic contact layer 613, and a drain electrode 615 formed from the samelayer as the source electrode 614.

The drain electrode 615 of the first thin film transistor 610, the drainelectrode 625 of the second thin film transistor 620, and the drainelectrode 635 of the third thin film transistor 630 are connected to thefirst pixel electrode 641, the second pixel electrode 642, and the thirdpixel electrode 643, respectively, to output a pixel voltage. The first,second, and third pixel electrodes 641, 642, and 643 are formed in thefirst, second, and third pixel areas PA1, PA2, and PA3, respectively,and each include a transparent conductive material such as ITO or IZO.

The array substrate 600 further includes a gate insulating layer 161 anda protective layer 162 to protect the metal wires. The gate insulatinglayer 161 is arranged on the first base substrate 110 to cover the gateline GL and the gate electrodes. The protective layer 162 is arranged onthe gate insulating layer 161 to cover the first, second, and third datalines DL1, DL2, and DL3 and the first, second, and third thin filmtransistors 610, 620, and 630.

Also, the array substrate 600 further includes a common voltage line CL,first storage electrodes SE1 a, SE1 b, and SEL1 c, and second storageelectrodes SE2 a, SE2 b, and SE2 c. The common voltage line CL is formedon the same layer as the gate line GL. The first storage electrodes SEL1a, SE1 b, and SEL1 c are branched from the common voltage line CL andarranged in the first, second, and third pixel areas PA1, PA2, and PA3,respectively. The second storage electrodes SE2 a, SE2 b, and SE2 cextend from the drain electrodes 615, 625, and 635 of the first, second,and third thin film transistors 610, 620, and 630, respectively, and arearranged on the first storage electrodes SE1 a, SE1 b, and SEL1 c,respectively.

The first color filter 651, the second color filter 652, and the thirdcolor filter 653 are formed on the protective layer 162. Each colorfilter 651, 652, and 653 includes a different color and displays thecolor using light. In the present exemplary embodiment, each colorfilter 651, 652, and 653 includes a red, green, or blue color filter.

The first color filter 651 is formed in the first pixel area PA1 and ispartially removed in the area corresponding to the second storageelectrode SE2 a of the first pixel area PA1. The second color filter 652is formed in the second pixel area PA2 and is partially removed in thearea corresponding to the second storage electrode SE2 b of the secondpixel area PA2. The first pixel electrode 641 and the second pixelelectrode 642 are formed on the first color filter 651 and the secondcolor filter 652, respectively.

The third color filter 653 covers the entire third pixel area PA3 and isarranged on the storage electrode SE2 a of the first pixel area PA1 andthe storage electrode SE2 b of the second pixel area PA2. The thirdcolor filter 653 is arranged partially under the first and second pixelelectrodes 641 and 642 in the first and the second pixel areas PA1 andPA2, respectively, and is arranged under the third pixel electrode 643in the third pixel area PA3. The first and second color filters 651 and652 surround the third color filter 653 in the first and the secondpixel areas PA1 and PA2, respectively, in a plan view.

The third color filter 653 and the protective layer 162 are partiallyremoved to form contact holes CH1, CH2, and CH3. The contact holes CH1,CH2, and CH3 are formed in the first, second, and third pixel areas PA1,PA2, and PA3, respectively, and the second storage electrodes SE2 a, SE2b, and SE2 c are exposed through the contact holes CH1, CH2, and CH3,respectively. The first, second, and third pixel electrodes 641, 642,and 643 are connected to the second storage electrodes SE2 a, SE2 b, andSE2 c through the contact holes CH1, CH2, and CH3, respectively,thereby-connecting the first, second, and third pixel electrodes 641,642, and 643 and the first, second, and third thin film transistors 610,620, and 630, respectively.

As described above, the third color filter 653 is formed in each of thefirst, second, and third pixel areas PA1, PA2, and PA3 and is partiallyremoved to form the contact holes CH1, CH2, and CH3. Thus, the contactholes CH1, CH2, and CH3 are the same size to prevent the first, second,and third pixel electrodes 641, 642, and 643 from being insulated fromthe second storage electrodes SE2 a, SE2 b, and SE2 c, thereby improvingproduct yield.

The opposite substrate 700 is arranged on the array substrate 600. Theopposite substrate 700 includes a second base substrate 210 facing thefirst base substrate 110, a black matrix 710 arranged on the second basesubstrate 210, an overcoat layer 720 arranged on the second basesubstrate 210 to cover the black matrix 710, and a common electrode 730formed on the overcoat layer 720.

The black matrix 710 is arranged corresponding to the first, second, andthird thin film transistors 610, 620, and 630 and blocks the light. Theblack matrix 710 may include an organic material or a metallic materialto block the light.

The liquid crystal display panel 900 further includes spacers 810, 820,and 830 to maintain a cell gap between the array substrate 600 and theopposite substrate 700. The spacers 810, 820, and 830 are interposedbetween the array substrate 600 and the opposite substrate 700 andinclude the same material as the third color filter 653. The spacers810, 820, and 830 are formed through the same process as the third colorfilter 653 and thus, are formed substantially simultaneously with thethird color filter 653. Thus, the number of masks, the number ofmanufacturing steps, and the manufacturing costs may be reduced, therebyimproving productivity.

FIG. 6A, FIG. 6B, FIG. 6C, FIG. 6D, and FIG. 6E are sectional viewsshowing a method of manufacturing the array substrate and the spacershown in FIG. 5.

Referring to FIG. 6A, the first, second, and third thin film transistors610, 620, and 630, the gate insulating layer 161, and the first andsecond storage electrodes SEL1 a, SE1 b, SEL1 c, SE2 a, SE2 b, and SE2 care formed on the first base substrate 110. The protective layer 162 isalso formed on the first base substrate 110 to cover the first, second,and third thin film transistors 610, 620, and 630, the gate insulatinglayer 161, and the first and second storage electrodes SE1 a, SE1 b,SEL1 c, SE2 a, SE2 b, and SE2 c.

Referring to FIG. 6B, a first photoresist layer (not shown) is depositedon the protective layer 162 and patterned to form the first color filter651 in the first pixel area PA1. While patterning the first photoresistlayer, the first color filter 651 is partially removed in the areacorresponding to the second storage electrode SE2 a of the first pixelarea PA1 to form an opening 651 a.

Then, a second photoresist layer (not shown) is deposited on theprotective layer 162 and patterned to form the second color filter 652in the second pixel area PA2. While patterning the second photoresistlayer, the second color filter 652 is partially removed in the areacorresponding to the second storage electrode SE2 b of the second pixelarea PA2 to form an opening 652 a.

Referring to FIG. 6C and FIG. 6D, a third photoresist layer 20 isdeposited on the protective layer 162. The openings 651 a and 652 aformed through the first color filter 651 and the second color filter652, respectively, are filled with the third photoresist layer 20.

Then, the third photoresist layer 20 is patterned to form the thirdcolor filter 653 and the spacers 810, 820, and 830. While patterning thethird photoresist layer 20, the third color filter 653 is partiallyremoved on the second storage electrodes SE2 a, SE2 b, and SE2 c to formthe contact holes CH1, CH2, and CH3. Since the third color filter 653and the spacers 810, 820, and 830 are formed substantiallysimultaneously through the same process, it may be possible to reducethe number of masks, the number of manufacturing steps, and themanufacturing costs, thereby improving productivity.

Referring to FIG. 5 and FIG. 6E, the protective layer 162 is partiallyremoved to form the contact holes CH1, CH2, and CH3. Then, the first,second, and third pixel electrodes 641, 642, and 643 are formed,completing the array substrate 600 and the spacers 810, 820, and 830.

According to the above, the array substrate may include color filtershaving two or more colors, and the black matrix may be partially removedto form a contact hole in each pixel area. Thus, the contact holes havethe same size, and the pixel electrode is connected to the thin filmtransistor, which may improve product yield.

Also, the black matrix and the spacer of the liquid crystal displaypanel are formed substantially simultaneously through the same processusing the same material, so that the number of masks, the number ofmanufacturing steps, and the manufacturing costs may be reduced, therebyimproving productivity.

The array substrate may include color filters that display an image andthe color filters may be formed in corresponding pixel areas. Each colorfilter is partially removed to form a contact hole in each pixel area.Thus, it may be possible to prevent the pixel electrode from beinginsulated from the thin film transistor, thereby improving productyield.

Also, since the color filter, through which the contact hole is formed,and the spacer of the liquid crystal display panel are formedsubstantially simultaneously through the same process using the samematerial, it may be possible to reduce the number of masks, the numberof manufacturing steps, and the manufacturing costs, thereby improvingproductivity.

It will be apparent to those skilled in the art that variousmodifications and variations can be made in the present inventionwithout departing from the spirit or scope of the invention. Thus, it isintended that the present invention cover the modifications andvariations of this invention provided they come within the scope of theappended claims and their equivalents.

1. An array substrate, comprising: a base substrate on which a pluralityof pixel areas is defined to display an image; a thin film transistorarranged in each pixel area; an insulation member arranged in each pixelarea and provided with a contact hole through which the thin filmtransistor is exposed, the insulation members all comprising the samematerial; a pixel electrode arranged in each pixel area to cover theinsulation member, the pixel electrode being connected to the thin filmtransistor through the contact hole; and a color filter layer comprisingcolor filters arranged under the pixel electrode to surround theinsulation members.
 2. The array substrate of claim 1, wherein theinsulation member comprises an organic material to block light.
 3. Thearray substrate of claim 1, wherein the insulation member comprises ofthe same material as a color filter.
 4. The array substrate of claim 3,wherein the color filters of the color filter layer comprise red, green,and blue filters, a color filter is arranged in each pixel area, and theinsulation member comprises of the same material as either the red,green, or blue color filter.
 5. The array substrate of claim 1, furthercomprising: a first storage electrode arranged in each pixel area; and asecond storage electrode arranged on and insulated from the firststorage electrode.
 6. The array substrate of claim 5, wherein theinsulation member is positioned on the second storage electrode, and thepixel electrode is connected to the thin film transistor via secondstorage electrode.
 7. The array substrate of claim 6, wherein the secondstorage electrode extends from a drain electrode of the thin filmtransistor.
 8. The array substrate of claim 7, further comprising: agate line arranged on the base substrate to transmit a gate signal; adata line insulated from and crossing the gate line to define a pixelarea and transmit a data signal corresponding to the image; and a commonvoltage line extending in a same direction as the gate line to transmita common voltage, wherein the first storage electrode is branched fromthe common voltage line.
 9. A display panel comprising: an arraysubstrate; and an opposite substrate facing the array substrate, thearray substrate comprising: a first base substrate on which a pluralityof pixel areas is defined to display an image; a thin film transistorarranged in each pixel area; an insulation member arranged in each pixelarea and provided with a contact hole through which the thin filmtransistor is exposed, the insulation members all comprising the samematerial; a pixel electrode arranged in each pixel area to cover theinsulation member, the pixel electrode being connected to the thin filmtransistor through the contact hole; and a color filter layer comprisingcolor filters arranged under the pixel electrode to surround theinsulation members.
 10. The display panel of claim 9, further comprisinga spacer interposed between the array substrate and the oppositesubstrate to maintain a cell gap between the array substrate and theopposite substrate, the spacer comprising the same material as theinsulation member.
 11. The display panel of claim 10, wherein the spaceris positioned on an upper portion of the thin film transistor.
 12. Thedisplay panel of claim 10, wherein the opposite substrate comprises: asecond base substrate facing the first base substrate; and a commonelectrode arranged on the second base substrate.
 13. The display panelof claim 12, wherein the insulation member comprises an organic materialto block light.
 14. The display panel of claim 12, wherein the colorfilters of the color filter layer comprise red, green, and blue filters,a color filter is arranged in each pixel area, and the insulation membercomprises the same material as either the red, green, or blue colorfilter.
 15. The display panel of claim 14, wherein the oppositesubstrate further comprises a black matrix arranged on the second basesubstrate and between the pixel areas to block light.
 16. The displaypanel of claim 9, further comprising a liquid crystal layer disposedbetween the array substrate and the opposite substrate to adjust atransmittance of a light applied thereto.
 17. A method of manufacturinga display panel, comprising: forming a thin film transistor, a firststorage electrode, and a second storage electrode in a pixel area of afirst base substrate, the second storage electrode being branched from adrain electrode of the thin film transistor and disposed on the firststorage electrode; forming a color filter in the pixel area; removingthe color filter formed on the second storage electrode; forming a blackmatrix on the second storage electrode, the black matrix being providedwith a contact hole; forming a pixel electrode on the color filter andthe black matrix such that the pixel electrode is connected to thesecond storage electrode through the contact hole; forming a commonelectrode on a second base substrate; and coupling the first basesubstrate with the second base substrate.
 18. The method of claim 17,wherein forming a black matrix comprises: forming a black photoresistlayer on the first base substrate; and patterning the black photoresistlayer to form the black matrix and the contact hole.
 19. The method ofclaim 18, further comprising forming a spacer on the thin filmtransistor to maintain a cell gap between the first base substrate andthe second base substrate, the spacer being formed before the pixelelectrode.
 20. The method of claim 19, wherein the spacer is formedsubstantially simultaneously with the black matrix.